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AMG-PU005 analog system base chip, i/o powerstage, op-amps 1. functional description the AMG-PU005 has both n-channel and p-channel output drivers, a buck and linear regulator and two op-amps. it is highly suitable as a supply and output stage for many applications such as mcu power stage, i/o and sensor interface. 2. features ? supply voltage: 5vdc...36vdc ? 5v/20ma linear regulator ? adjustable fix frequency buck regulator (8v...34v) ? 100ma p-channel and n-channel over-current & short-circuit protected open drain outputs ? 2 led current sinks 2ma ? 2 operational amplifiers ? buck & linear regulator may be connected parallel or in a series ? package: qfn24 C body size: 4mm x 4mm x 0.85mm ? rohs compliant 3. application ? inductive proximity sensor ? optical switch ? sensor preamplifier ? led driver ? dc motor control ? hv preamplifier ? level shifter ? uart C rs232 converter ? monoflop ? wdt and vdd monitor ? oscillator ? over current and temperature protection ? audio amplifier ? mcu power stage, i/o and sensor interface AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 1 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps 3.1. example application schematic AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 2 of 14 figure 1 : pu005 with basic external circuitry surge prot. vp vs/vl/vdd surge prot. pd surge prot. nd in1 in2 in3 ocp ocp output control temp uvlo buck reg. 5v linear reg. band gap start up vdd fb lx vs dp dn pgnd d1 d2 oa1p oa2p oa2n oa1o oa2o gnd 2 in4 vl amgxxxx ls hvps oa1n bonding option or fuse e n c s e l hvg rset in1 in2 in3 ocp ocp output control temp uvlo buck reg. 5v linear reg. band gap start up vdd fb lx vs dp dn pgnd d1 d2 oa1p oa2p oa2n oa1o oa2o gnd 2 in4 vl AMG-PU005 / r104 ls hvps oa1n bonding option e n c s e l hvg rset in1 in2 in3 ocp ocp output control temp uvlo buck reg. 5v linear reg. band gap start up vdd fb lx vs dp dn pgnd d1 d2 oa1p oa2p oa2n oa1o oa2o gnd 2 in4 vl AMG-PU005 ls hvps oa1n hvg rset
AMG-PU005 analog system base chip, i/o powerstage, op-amps table of contents 1.functional description ........................................................................................................... 1 2.features ................................................................................................................................. 1 3.application ............................................................................................................................. 1 3.1.example application schematic ............................................................................................... 2 4.block diagram ....................................................................................................................... 4 5.block descriptions ................................................................................................................. 5 5.1.output control - logic table ..................................................................................................... 5 5.2.over current protection (ocp) block ...................................................................................... 5 5.3.level shifter (ls) ...................................................................................................................... 5 5.4.high voltage power supply (hvps) ........................................................................................ 5 5.5.under voltage lock out (uvlo) .............................................................................................. 5 5.6.over-temperature protection block (temp) ............................................................................. 5 5.7.buck regulator ......................................................................................................................... 5 5.8.5v linear regulator ................................................................................................................. 6 5.9.open drain drivers ................................................................................................................... 6 5.10.led current-sink blocks ........................................................................................................ 6 5.11.op-amp blocks ...................................................................................................................... 6 6.pinning ................................................................................................................................... 6 7.absolute maximum ratings ................................................................................................... 8 8.electrical characteristics ........................................................................................................ 8 8.1.operational range ................................................................................................................... 8 8.2.dc characteristics ................................................................................................................... 9 8.3.ac characteristics .................................................................................................................. 10 8.4.application notes .................................................................................................................... 11 9.ic-package .......................................................................................................................... 12 9.1.qfn24 C quad flat no-leads package, 24 leads, rohs compliant ...................................... 12 10.ic-marking ......................................................................................................................... 13 11.ordering information .......................................................................................................... 13 12.notes and cautions ........................................................................................................... 13 12.1.esd protection ..................................................................................................................... 13 12.2.storage conditions ................................................................................................................ 14 13.disclaimer .......................................................................................................................... 14 14.contact information ............................................................................................................ 14 AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 3 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps 4. block diagram AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 4 of 14 figure 2 : block diagram in1 in2 in3 ocp ocp output control temp uvlo buck reg. 5v linear reg. band gap start up vdd fb lx vs dp dn pgnd d1 d2 oa1p oa2p oa2n oa1o oa2o gnd 2 in4 vl AMG-PU005 ls hvps oa1n hvg rset
AMG-PU005 analog system base chip, i/o powerstage, op-amps 5. block descriptions 5.1. output control - logic table inputs outputs in1 in2 in3 in4 ls hs ld1 ld2 1 on 0 off 1 on 0 off 1 on 0 off 1 on 0 off 5.2. over current protection (ocp) block the ocp block prevents the n- and p-driver open drain outputs from driving disruptive currents. 5.3. level shifter (ls) internal level shifter to translate switching signals from the low voltage domain to the high voltage domain. it is dedicated to drive the open drain p-driver gate. 5.4. high voltage power supply (hvps) the hvps supplies the level shifter block with the high voltage needed to drive the open drain p-driver gate. it supplies even the n-driver's protection circuit and the buck regulator's driver stage. 5.5. under voltage lock out (uvlo) the uvlo block detects under-voltage events on vdd and disables the outputs in case of such event. this prevents the ic from under-voltage driven malfunctions. 5.6. over-temperature protection block (temp) the temp block prevents the ic from thermal overload. in case of such overload the outputs will be switched off. 5.7. buck regulator this block allows to build an efficient step-down dc-dc converter. depending on the load it supports continuous current mode, discontinuous current mode and cycle skipping mode. the buck regulator is over-current and short circuit protected. AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 5 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps 5.8. 5v linear regulator the 5v linear regulator is a shunt regulator which can be used to generate about 5v from voltages up to 36v. it is over-current and short circuit protected. 5.9. open drain drivers the AMG-PU005 has got a n-channel and p-channel driver with 100ma output current driving capability each. both drivers are built in open drain configuration. the drivers are over-current and over-temperature protected. 5.10. led current-sink blocks the current sink blocks are dedicated to drive leds from a supply voltage (5-36v) with a current of 2ma each. 5.11. op-amp blocks the general purpose op-amp blocks allow the customer to built own i/o interfaces. the op- amps provide a rail-to-rail input and output. 6. pinning pin# symbol description 1 vdd linear regulator output and decoupling output 2 vl linear regulator input voltage 3 hvg hv decoupling 4 lx buck regulator output 5 vs supply voltage 6 dp open drain output of p-driver 7 dn open drain output of n-driver 8 pgnd power ground 9 d1 led current sink input 1 10 d2 led current sink input 2 11 gnd analog gnd 12 rset bias current set resistor 13 oa1o op-amp 1 output 14 oa1n inverting input of op-amp 2 15 oa1p non inverting input of op-amp 1 16 oa2p non inverting input of op-amp 2 17 oa2n inverting input of op-amp 2 18 oa2o op-amp 2 output AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 6 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps pin# symbol description 19 in1 logic input 20 in2 logic input 21 in3 logic input 22 in4 logic input 23 n.c. not connected 24 fb buck regulator feed back input figure 3 : qfn24 pinout AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 7 of 14 7 13 19 p u 0 0 5 top view oa2p vdd vl lx dp d n r s e t oa2o oa1n i n 1 f b d 2 center pad = gnd hvg i n 2 i n 3 oa2n vs p g n d d 1 oa1o oa1p g n d n . c . i n 4 1
AMG-PU005 analog system base chip, i/o powerstage, op-amps 7. absolute maximum ratings the absolute maximum ratings may not be exceeded under any circumstances. # symbol parameter min max unit 1 v vs supply voltage 37.8 v 2 v pin_hv maximum voltage at pins dp, dn, d1, d2, lx, vl, hvg (high voltage pins) -0.3 vs+0.3 v 3 v vdd maximum analog voltage supply (if applied from external) 5.5 v 4 v pin_lv maximum voltage at all other pins (low voltage pins) -0.3 v vdd +0.3 v 5 i dn , i dp drain output current 100 ma 6 i bo buck regulator output current for external loads 50 ma 7 i vdd linear regulator output current for external loads 25 ma 8 t stg storage temperature range (see chapter 14.2) -55 150 c 9 t j junction temperature -55 150 c 10 v esd esd protection test voltage (hbm, mil-std-883d, method 3015.7 class 2) 1) -2000 2000 v note: 1) esd test condition valid for any pin without external protection circuitry 8. electrical characteristics 8.1. operational range # symbol parameter min max unit 1 v vs,bs supply voltage range using buck and linear regulator 7.5 36 v 2 v vs,so supply voltage range using linear regulator only 5.75 36 v 3 v vs,lx supply voltage range using buck regulator only 6.5 36 v 4 v vdd analog supply voltage range if applied externally 4.5 5.5 v 5 ta ambient operating temperature -25 85 c 6 fsw i/o switching frequency 400 600 khz AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 8 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps 8.2. dc characteristics unless otherwise specified, the minimum and maximum characteristics contain the spread of values guaranteed within the specified operating conditions. unless otherwise specified, typical values are given with v vs = 36v, t j = 25c # symbol parameter conditions min typ max unit general parameters 1 i vs1 supply current w/o external loads, with buck regulator in steady state v vs =36v 1 ma 2 i vs2 supply current w/o external loads, buck regulator deactivated v vs =36v 260 a 3 v rset bias current reference voltage 1.25 v buck regulator 4 v vl output voltage range (adjustable by external resistor divider) v vs 10v i loadext b =40ma 4.75 8 v vs - 2 v 5 v drop b saturation voltage drop iloadextb=40ma 2 v 6 v fb reference voltage 2.5 v 7 v fb_ov overvoltage lockout 2.75 v 8 i buck operating current v fb < v fb_ov tbd ma 9 v fb_boff buck switch off input voltage 3.5 v dd v 5v linear regulator 10 v vdd output voltage 6v v vl 16v i loadext s =20ma 4.75 5 5.25 v 11 v vddsat output voltage saturated 5.5v v vl 6.5v i loadext s =20ma v vl -1 v 12 v drop s saturation voltage drop i loadext s =20ma 1 v open drain drivers (fets) 13 v drop dp p-channel rdson voltage drop v vs =36v iloadp=-100ma 1 v 14 v drop dn n-channel rdson voltage drop v vs =36v iloadn=100ma 1 v led current sinks 15 i dx led driver constant current sink v dx =36v 1.8 2 2.2 ma op-amps 16 v in,oax op-amp input voltage range 0.5 v vdd - 0.5 v 17 v in.offs input offset voltage i out =0ua i out = 100ua 10 15 mv 18 i in,oax op-amp input current 200 na 19 v out,oax op-amp output voltage range 0 v vdd v 20 i out,oax op-amp output current driving capability v out,c =v vdd /2 1 ma AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 9 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps # symbol parameter conditions min typ max unit logic inputs 21 i in_h logic high input current v vdd =4.5~5.5v -0.1 0.1 ua 22 i in_l logic low input current v vdd =4.5~5.5v -50 -10 ua 23 v in,l logic low input voltage 0 0.3* v vdd v 24 v in,h logic high input voltage 0.5* v vdd v vdd v 8.3. ac characteristics unless otherwise specified, the minimum and maximum characteristics contain the spread of values guaranteed within the specified operating conditions and the technology process parameter range. unless otherwise specified, typical values are given with v vs = 36v, t j = 25c # symbol parameter conditions min typ max unit buck regulator 1 fsw output switching frequency 500 khz 2 dc duty cycle 95 % op-amps 3 f t transit frequency open loop 1 2.8 mhz 4 gvmax max voltage gain open loop 105 db 5 gv voltage gain open loop; 10khz 40 49.5 db 6 cmrr common mode rejection ratio 10khz tbd -71 db 7 psrr power supply rejection ratio 10khz tbd -51.3 db 8 m ph phase margin open loop (f t ) 72.7 deg AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 10 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps 8.4. application notes 8.4.1. supply concepts the AMG-PU005 can be used with different supply strategies and ranges. it contains a buck regulator and a linear regulator. the minimum voltage drops of the regulators to be considered are: - buck regulator: v dropb = 2v (to be adjusted by external resistor divider) - linear regulator: v dropl =1v (in case of saturation, v vl 6v). thus none or one or both regulators may be used (see operational voltage range limitations). the buck regulator is able to drive about 40ma external load in total. if it has to supply the linear regulator the maximum external load current will be reduced by the load of the linear regulator (max. 20ma). the buck regulator's external coil should be larger than 220uh. AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 11 of 14 figure 4 : different supply concepts overview surge prot. vp buck reg. 5v linear reg. vdd fb lx vs vl surge prot. vp buck reg. 5v linear reg. vdd fb lx vs vl buck reg. 5v linear reg. vdd fb lx vs vl surge prot. vp buck reg. 5v linear reg. vdd fb lx vs vl surge prot. vp a) supply concept using buck and linear regulator b) supply concept using buck only c) supply concept using linear regulator only d) supply concept using neither buck nor linear regulator (5v external supply
AMG-PU005 analog system base chip, i/o powerstage, op-amps 8.4.2. surge protection pins which are subject to surges need to be adequately protected by external protection devices and appropriate pcb layout. device functionality might get interrupted during surges. alpha microelectronics could give you some layout and circuitry guidelines for good surge protection. 9. ic-package 9.1. qfn24 C quad flat no-leads package, 24 leads, rohs compliant symbol dimensions in mm, angles in deg min nom max a 0.80 0.85 0.90 a1 0 0.010 0.030 a3 - 0.20 - b 0.18 0.23 0.28 d 3.95 4.00 4.03 d1 - 2.60 - e 3.95 4.00 4.03 e1 - 2.60 - AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 12 of 14
AMG-PU005 analog system base chip, i/o powerstage, op-amps e - 0.50 - l 0.35 0.4 0.45 -12 - 0 ccc - 0.08 - m - - 0.05 10. ic-marking 11. ordering information AMG-PU005 -iqn24r (qfn24, tape & reel) 12. notes and cautions 12.1. esd protection the requirements for handling electrostatic discharge sensitive devices are described in the jedec standard jesd625-a. please note the following recommendations: ? when handling the device, operators must be grounded by wearing a for the purpose designed grounded wrist strap with at least 1m resistance and direct skin contact. ? operators must at all times wear esd protective shoes or the area should be surrounded by for esd protection intended floor mats. ? opening of the protective esd package that the device is delivered in must only occur at a properly equipped esd workbench. the tape with which the package is held together must be cut with a sharp cutting tool, never pulled or ripped off. ? any unnecessary contact with the device or any unprotected conductive points should be avoided. ? work only with qualified and grounded tools, measuring equipment, casing and workbenches. ? outside properly protected esd-areas the device or any electronic assembly that it may be part of should always be transported in egb/esd shielded packaging. AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 13 of 14 pu005 yyww ******* date code lot number top marking by laser
AMG-PU005 analog system base chip, i/o powerstage, op-amps 12.2. storage conditions the AMG-PU005 corresponds to moisture sensitivity classification ml2 , according to jedec standard j-std-020, and should be handled and stored according to j-std-033. 13. disclaimer information given in this data sheet is believed to be accurate and reliable. however, no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties that may result from its use. the values stated in absolute maximum ratings may under no circumstances be exceeded. no warranty is given for use in life support systems or medical equipment without the specific written consent of alpha microelectronics gmbh. for questions regarding the application please contact the publisher. the declared data are only a description of the product. they are not guaranteed properties as defined by law. examples are given without obligations and cannot give rise to any liability. reprinting of this data sheet C or any part of it C is not allowed without the license of the publisher. data sheets are subject to change without any notice. 14. contact information this data sheet is published by alpha microelectronics gmbh. to order samples or inquire information please contact: alpha microelectronics gmbh im technologiepark 1 15236 frankfurt (oder) germany am.info@alpha-microelectronics.de www.alpha-microelectronics.de +49-335-557-1750 (telephone) +49-335-557-1759 (fax) ? all rights reserved. AMG-PU005 revision: b 9. nov. 2012 ? all rights reserved page 14 of 14

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